1. Field of the Invention
The present invention relates to a semiconductor memory device. For example, the present invention relates to a voltage control method for bit lines in a read operation and a voltage control method for word lines in a write operation.
2. Description of the Related Art
In recent years, with an increase in information amount, increasing an NAND flash memory capacity is often demanded. With this demand, miniaturization of metal wiring lines including bit lines or word lines has advanced, and a line width thereof has reached a limit of a photolithography resolution.
Thus, a sidewall processing technique that enables forming a line width smaller than that of the resolution involved in photolithography is adopted. JP-A 2002-280388 (KOKAI) discloses that using the sidewall processing technology enables forming a line width that is approximately a half of a line width as a minimum processing dimension formed by using the lithography technology.